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#	Item
541	An Illustration of the Benefits of the MIPS R12000 Microprocessor and OCTANE System Architecture ® ® Add to Reading List Source URL: vintagecomputers.info Language: English - Date: 2003-03-12 08:39:29 Central processing unit Computer memory R10000 MIPS Technologies CPU cache Silicon Graphics PA-8000 POWER3 Translation lookaside buffer Computer hardware Computer architecture Computing
542	LOT-ECC: LOcalized and Tiered Reliability Mechanisms for Commodity Memory Systems ∗ Aniruddha N. Udipi† † Naveen Muralimanohar‡ Add to Reading List Source URL: www.cs.utah.edu Language: English - Date: 2012-07-05 23:25:37 Digital media Chipkill Dynamic random-access memory RAM parity Soft error DIMM CPU cache Error detection and correction DDR3 SDRAM Computer memory Computer hardware Computing
543	Staged Reads : Mitigating the Impact of DRAM Writes on DRAM Reads ∗ Niladrish Chatterjee University of Utah Naveen Muralimanohar Add to Reading List Source URL: www.cs.utah.edu Language: English - Date: 2012-01-10 00:00:20 Dynamic random-access memory CPU cache Random-access memory Write buffer Memory controller CAS latency Memory hierarchy DDR3 SDRAM RLDRAM Computer memory Computer hardware Computing
544	Sandbox Prefetching: Safe Run-Time Evaluation of Aggressive Prefetchers Seth H Pugsley1 , Zeshan Chishti2 , Chris Wilkerson2 , Peng-fei Chuang3 , Robert L Scott3 , Aamer Jaleel4 , Shih-Lien Lu2 , Kingsum Chow3 , and Raje Add to Reading List Source URL: www.cs.utah.edu Language: English - Date: 2014-01-10 15:51:59 Computer architecture Prefetcher CPU cache AMD 10h Memory hierarchy Cache NForce Lookup table Acumem SlowSpotter Computer hardware Computing Computer memory
545	AMX™ Timing Guide and Data for AMX 86 Multitasking Executive First Printing: April 2, 2001 Add to Reading List Source URL: www.kadak.com Language: English - Date: 2005-03-01 18:08:00 Central processing unit Classes of computers Computer memory AMC AMX Coupes CPU cache Microarchitecture Instruction set Cache Computer hardware Computer architecture Computing
546	AMX™ Timing Guide and Data for AMX CFire Multitasking Executive First Printing: June 1, 1999 Add to Reading List Source URL: www.kadak.com Language: English - Date: 2002-11-01 16:04:00 Computing Classes of computers Computer memory AMC AMX Coupes CPU cache Instruction set Superscalar Microarchitecture Computer hardware Computer architecture Central processing unit
547	MemZip: Exploring Unconventional Benefits from Memory Compression ∗ Ali Shafiee Meysam Taassori Rajeev Balasubramonian University of Utah Add to Reading List Source URL: www.cs.utah.edu Language: English - Date: 2014-01-10 15:50:12 CPU cache Dynamic random-access memory Memory bandwidth DDR3 SDRAM UltraSPARC III Data structure alignment CAS latency POWER1 Random-access memory Computer memory Computer hardware Computing
548	Evaluating the Memory Performance of a ccNUMA System Uroˇs Prestor September 5, 2001 Abstract Add to Reading List Source URL: www.sgidepot.co.uk Language: English - Date: 2008-04-15 16:27:00 Computer hardware Cache coherency Central processing unit SGI Origin Cache coherence Symmetric multiprocessing Cache CPU cache R10000 Computing Parallel computing Computer memory
549	QED RISCMark™ RM7000™ 64-Bit Superscalar Microprocessor Advanced Information FEATURES: • Integrated memory management unit (RM52xx compatible) — Fully associative joint TLB (shared by I and D translations) Add to Reading List Source URL: vintagecomputers.info Language: English - Date: 1999-05-14 11:00:58 Quantum Effect Devices CPU cache R5000 R4000 Cache Motorola 68000 family R8000 KOMDIV-64 Computer hardware Computer architecture MIPS architecture
550	MIPS R5000 Microprocessor Technical Backgrounder Performance: SPECint95 Add to Reading List Source URL: www.sgidepot.co.uk Language: English - Date: 2008-04-15 15:08:30 MIPS architecture Central processing unit R4000 R4600 R8000 CPU cache R10000 R2000 Reduced instruction set computing Computer hardware Computer architecture R5000

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